ASIC Architect

About the role

A highly technical engineering team working on next-generation ASIC and semiconductor technologies is seeking an experienced ASIC Architect. This is a senior-level opportunity for an engineer with strong ASIC architecture and digital design experience who wants to take ownership of complex hardware architectures and work across the full development lifecycle. The role is open to candidates in Adelaide, Sydney or Melbourne.

Key responsibilities

• Define ASIC and SoC architectures based on system requirements
• Develop detailed hardware specifications and architectural documentation
• Make architectural decisions around performance, power, area and scalability
• Work closely with RTL, verification, FPGA, firmware and systems engineering teams to deliver high-performance, reliable silicon
• Support IP selection, integration and hardware interfaces
• Provide technical leadership throughout the ASIC development lifecycle
• Work with FPGA and embedded software teams on hardware/software integration
• Review designs, guide engineering teams and mentor engineers
• Identify and resolve complex architectural and design challenges

Required profile

• Strong commercial experience in ASIC architecture or digital design
• Excellent understanding of ASIC/SoC development methodologies
• Ability to work across hardware and software teams
• Applicants must currently reside in Australia and hold full Australian working rights; visa sponsorship is not available

Required skills

• Strong Verilog and/or SystemVerilog experience
• RTL design and hardware architecture
• ASIC verification methodologies and UVM
• IP integration and complex digital systems
• Timing, power and area considerations
• FPGA technologies

Desirable: RISC-V or ARM architectures, AI/ML accelerators, DSP or signal processing, high-speed interfaces (PCIe, DDR, Ethernet), FPGA prototyping, embedded systems, safety-critical or high-reliability systems.